View LTC3854IDDB_4860415.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

FeaTures
n n n n n n n n n
LTC3854 Small Footprint, Wide VIN Range Synchronous Step-Down DC/DC Controller DescripTion
The LTC3854(R) is a high performance synchronous stepdown switching DC/DC controller that drives an all Nchannel synchronous power MOSFET stage. The LTC3854 features a 400kHz constant frequency current mode architecture. The LTC3854 operates from a 4.5V to 38V (40V absolute maximum) input voltage range and regulates the output voltage from 0.8V to 5.5V. The RUN/SS pin provides both soft-start and enable features. OPTI-LOOP compensation allows the transient response to be optimized over a wide range of output capacitance and ESR values. Current foldback limits MOSFET dissipation during short circuit conditions. Current foldback functions are disabled during soft-start. The LTC3854 has a minimum on-time at 75ns, making it well suited for high step-down ratios. The strong onboard MOSFET drivers allow the use of high power external MOSFETs to produce output currents up to 20A.
L, LT, LTC, LTM, Linear Technology, the Linear logo and OPTI-LOOP are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents, including 5705919, 6498466, 5408150, 6222231.
n n n n n
Wide Operating VIN Range: 4.5V to 38V RSENSE or DCR Current Sensing 1% 0.8V Reference Accuracy Over Temperature 400kHz Switching Frequency Dual N-channel MOSFET Synchronous Drive Very Low Dropout Operation: 97% Duty Cycle Starts Up Into Pre-Biased Output Adjustable Output Voltage Soft-Start Output Current Foldback Limiting (Disabled During Soft-Start) Output Overvoltage Protection 5V LDO for External Gate Drive OPTI-LOOP(R) Compensation Minimizes COUT Low Shutdown IQ: 15A Tiny Thermally Enhanced 12-Pin 2mm x 3mm DFN and MSOP Packages
applicaTions
n n n n
Automotive Systems Telecom Systems Industrial Equipment Distributed DC Power Systems
Typical applicaTion
High Efficiency Synchronous Step-Down Converter
VIN TG 0.1F LTC3854 RUN/SS 2200pF 10k 8.06k FB 42.2k SENSE- SENSE+ GND BG 100pF INTVCC 4.7F 4.99k 92 1 2 3 4 5 LOAD CURRENT (A) 5.49k 0.22F ITH BOOST SW 4.7H AT 8.2m DCR VOUT 5V 7A 150F 93 VIN = 12V 6 7
3854 TA01b
Efficiency and Power Loss vs Load Current
97 EFFICIENCY 2.0
47F 50V 0.1F
VIN 6V TO 38V
96 EFFICIENCY (%)
1.6 POWER LOSS (W)
95
1.2
+
94 POWER LOSS
0.8
0.4
0
3854 TA01
3854fa
LTC3854 absoluTe MaxiMuM raTings
(Note 1)
Input Supply Voltage (VIN) ........................ 40V to -0.3V Top Side Driver Voltage (BOOST) .............. 46V to -0.3V Switch Voltage (SW) .................................. 40V to -5.0V INTVCC, BOOST-SW .................................... 6V to -0.3V SENSE+, SENSE- ......................................... 6V to -0.3V RUN/SS........................................................ 6V to -0.3V
ITH, FB Voltages ....................................... 2.7V to -0.3V INTVCC Peak Output Current (Note 8) ....................40mA Operating Temperature Range (Notes 2, 3) ..........................................-40C to 85C Maximum Junction Temperature ...................... 125C Storage Temperature Range .................. -65C to 125C
pin conFiguraTion
TOP VIEW FB 1 ITH 2 RUN/SS 3 BOOST 4 TG 5 SW 6 13 12 SENSE+ 11 SENSE- 10 VIN 9 INTVCC 8 BG 7 GND FB ITH RUN/SS BOOST TG SW 1 2 3 4 5 6 TOP VIEW 12 11 10 9 8 7 SENSE+ SENSE- VIN INTVCC BG GND
13
DDB PACKAGE 12-LEAD (3mm 2mm) PLASTIC DFN TJMAX = 125C, JA = 76C/W, JC = 10C/W EXPOSED PAD (PIN 13) IS GND, MUST BE SOLDERED TO PCB
MSE PACKAGE 12-LEAD PLASTIC MSOP TJMAX = 125C, JA = 40C/W, JC = 16C/W EXPOSED PAD (PIN 13) IS GND, MUST BE SOLDERED TO PCB
orDer inForMaTion
LEAD FREE FINISH LTC3854EDDB#PBF LTC3854IDDB#PBF LTC3854EMSE#PBF LTC3854IMSE#PBF TAPE AND REEL LTC3854EDDB#TRPBF LTC3854IDDB#TRPBF LTC3854EMSE#TRPBF LTC3854IMSE#TRPBF PART MARKING* LDPC LDPC 3854 3854 PACKAGE DESCRIPTION 12-Lead (3mm x 2mm) Plastic DFN 12-Lead (3mm x 2mm) Plastic DFN 12-Lead Plastic MSOP 12-Lead Plastic MSOP TEMPERATURE RANGE -40C to 85C -40C to 85C -40C to 85C -40C to 85C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
3854fa
LTC3854 elecTrical characTerisTics
SYMBOL VIN VFB IFB VREFLNREG VLOADREG PARAMETER Operating Input Voltage Range Regulated Feedback Voltage Feedback Current Reference Voltage Line Regulation Output Voltage Load Regulation (Note 4); ITH Voltage = 1.2V (Note 4) VIN = 6V to 38V (Note 4) (Note 4) Measured in Servo Loop; ITH Voltage = 0.7V to 1.2V Measured in Servo Loop; ITH Voltage = 1.2V to 2V ITH = 1.2V; Sink/Source = 5A (Note 4) ITH = 1.2V; (Guaranteed by Design) (Note 5) RUN = 0V VIN Ramping Down; Measured at INTVCC VIN Ramping Down then Up; Measured at INTVCC Measured at FB VSENSE- = VSENSE+ = 3.3V In Dropout RUN/SS = 0V RUN/SS Pin Must be Taken Below this Value to Reset Part (or Put into Shutdown Mode) Soft-Start Mode FB = 0.7V, VSENSE- = 3.3V, VIN = 6V TG High TG Low BG High BG Low (Note 6) CLOAD = 3300pF CLOAD = 3300pF (Note 6) CLOAD = 3300pF CLOAD = 3300pF CLOAD = 3300pF Each Driver CLOAD = 3300pF Each Driver (Note 7) 6V < VIN < 38V ICC = 0 to 20mA 360 4.8 40 97 0.6
l l l l l
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VIN = 15V, VRUN = 5V, unless otherwise noted.
CONDITIONS MIN 4.5 0.792 0.8 5 0.002 0.1 -0.1 2.0 3 2 10 3.0 0.86 3.5 350 0.88 0.5 98 1.25 0.4 1.2 50 2.5 1.2 2.5 2.1 25 25 25 25 30 30 75 5.0 0.2 400 5.2 1.0 440 65 2.0 0.90 1 3 25 TYP MAX 38 0.808 50 0.02 0.5 -0.5 UNITS V V nA %/V % % mmho MHz mA A V mV V A % A V V mV ns ns ns ns ns ns ns V % kHz Main Control Loop
gm gmGBW IQ UVLO UVLOHYST VOVL ISENSE DFMAX IRUN/SS VRUN/SS_SD VRUN/SS_ON VSENSE(MAX) TG RUP TG RDOWN BG RUP BG RDOWN TG tr TG tf BG tr BG tf TG/BG t1D BG/TG t2D tON(MIN) VINTVCC VLDO INT Oscillator fSW
Transconductance Amplifier gm Transconductance Amplifier GBW Input DC Supply Current Normal Mode Shutdown Undervoltage Lockout Undervoltage Lockout Hysteresis Feedback Overvoltage Lockout Sense Pins Source Current Maximum Duty Factor Soft-Start Charge Current Shutdown Threshold Soft-Start Threshold Maximum Current Sense Threshold TG Driver Pull-Up On Resistance TG Driver Pull-Down On Resistance BG Driver Pull-Up On Resistance BG Driver Pull-down On Resistance TG Transition Time: Rise Time Fall Time BG Transition Time: Rise Time Fall Time Top Gate Off to Bottom Gate On Delay Synchronous Switch-On Delay Time Bottom Gate Off to Top Gate On Delay Top Switch-On Delay Time Minimum On-Time Internal VCC Voltage INTVCC Load Regulation Switching Frequency
INTVCC Linear Regulator
3854fa
LTC3854 elecTrical characTerisTics
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC3854E is guaranteed to meet performance specifications from 0C to 85C. Specifications over the -40C to 85C operating temperature range are assured by design, characterization and correlation with statistical process controls. The LTC3854I is guaranteed to meet performance specifications over the full -40C to 85C operating temperature range. Note 3: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formulas: LTC3854DDB: TJ = TA + (PD * 76C/W) LTC3854MSE: TJ = TA + (PD * 40C/W) Note 4: The LTC3854 is tested in a feedback loop that servos VITH to a specified voltage and measures the resultant VFB. Note 5: Dynamic supply current is higher due to the gate charge being delivered at the switching frequency. See Applications Information. Note 6: Rise and fall times are measured using 10% and 90% levels. Delay times are measured using 50% levels. Not 100% tested in production. Note 7: The minimum on-time condition is specified for an inductor peakto-peak ripple current 40% of IMAX (see Minimum On-Time Considerations in the Applications Information section). Note 8: The LTC3854 maximum LDO current specification assumes there is no external DC load current being pulled from INTVCC pin.
Typical perForMance characTerisTics
Efficiency vs Output Current
100 98 96 EFFICIENCY (%) 94 92 90 88 86 (SEE FIGURE 9) 1 2 3 4 6 5 7 8 LOAD CURRENT (A) 9 10 VIN = 6V VIN = 12V EFFICIENCY (%) VIN = 24V VIN = 32V VOUT = 5V 99 98 97 IOUT = 5A 96 95 94 93 (SEE FIGURE 9) 5 10 15 25 20 VIN (V) 30 35 40
3854 G02
Efficiency vs Input Voltage
VOUT = 5V
IOUT = 10A
3854 G01
5A Load Step VOUT = 5V, VIN = 24V
5VOUT 200mV/DIV ILOAD 10A/DIV 5A/DIV LOAD STEP 50s/DIV
3854 G03
Top Gate and Bottom Gate in Forced Continuous Mode
Top Gate and Bottom Gate in Dropout
BG BG
TG 4s/DIV
3854 G04
TG 4s/DIV
3854 G05
3854fa
LTC3854 Typical perForMance characTerisTics
Switching Waveforms at No Load
VOUT = 5V TG BG IL 1s/DIV
3854 G06
Switching Waveforms at High Duty Cycle, No Load
VOUT = 2.5V TG BG IL 2s/DIV
3854 G07
1.17 1.16 QUIESCENT CURRENT (mA) 1.15 1.14 1.13 1.12 1.11 1.10 1.09
Quiescent Current vs VIN
Quiescent Current vs Temperature
1.30 1.25 QUIESCENT CURRENT (mA) 1.20 INTVCC (V) 1.15 1.10 1.05 1.00 0.95 5.00 5.05
INTVCC vs Input Voltage
4.95
4.90
4.85
6
11
16
26 21 VIN (V)
31
36
3854 G08
0.90 -45 -25
-5
15 35 55 75 TEMPERATURE (C)
95
3854 G09
4.80
4
9
14
19 24 VIN (V)
29
34
39
3854 G10
Maximum Current Sense Threshold vs Sense Common Mode Voltage
60 58 56 VSENSE(MAX) (mV) VSENSE(MAX) (mV) 54 52 50 48 46 44 42 40 0 1 3 5 2 4 6 COMMON MODE VOLTAGE (V) 7
3854 G11
Maximum Current Sense Threshold vs Duty Cycle
MAXIMUM CURRENT SENSE VOLTAGE (mV) 65 60 55 50 45 40 35 60 50 40 30 20 10 0
Maximum Current Sense Voltage vs Feedback Voltage (Current Foldback)
0
20
60 40 80 DUTY CYCLE (%)
100
120
3854 G12
0
0.05 0.15 0.25 0.35 0.45 0.55 0.65 0.75 FB (V)
3854 G13
3854fa
LTC3854 Typical perForMance characTerisTics
Oscillator Frequency vs Temperature
440 430 FREQUENCY (kHz) 420 410 400 390 380 -40 -20 UVLO (V) 4.0 3.9 3.8 FREQUENCY (kHz) 3.7 3.6 3.5 3.4 3.3 3.2 3.1 0 20 40 60 80 TEMPERATURE (C) 100 120
3854 G15
Undervoltage Lockout Falling Threshold vs Temperature
440 430 420 410 400 390 380 370 0 20 40 60 80 TEMPERATURE (C) 100 120
3854 G16
Oscillator Frequency vs VIN
3.0 -40 -20
360
5
10
15
25 20 VIN (V)
30
35
40
3854 G17
Current Sense Threshold vs ITH Voltage
60 CURRENT SENSE THRESHOLD (mV) 50 40 30 20 10 0 -10 0 0.5 1 1.5 VITH (V) 2 2.5 3
3854 G18
Shutdown Current vs Input Voltage
30 25 SHUTDOWN CURRENT (A) SHUTDOWN CURRENT (A) 20 15 10 5 0 20 19 18 17 16 15 14 13 12 11 4 8 12 16 20 24 VIN (V) 28 32 36 40
Shutdown Current vs Temperature
VIN = 15V
10 -45 -30 -15 0 15 30 45 60 75 90 105 TEMPERATURE (C)
3854 G20
3854 G19
5.20 5.15 5.10 INTVCC (V)
INTVCC Load Regulation
VIN = 15V
5.20
INTVCC vs Temperature
RUN/SS Shutdown Threshold vs Temperature
1.40 1.35 1.30 RUN/SS (V) 1.25 1.20 1.15 1.10 -45 -30 -15 0 15 30 45 60 75 90 105 TEMPERATURE (C)
3854 G23
ILOAD = 10mA 5.15 VIN = 15V 5.10 INTVCC (V) 5.05 5.00 4.95 4.90 4.85
5.05 5.00 4.95 4.90 4.85 4.80 0 5 10 15 20 25 30 LDO CURRENT (mA) 35 40
4.80 -45 -30 -15 0 15 30 45 60 75 90 105 TEMPERATURE (C)
3854 G22
3854 G21
3854fa
LTC3854 pin FuncTions
FB (Pin 1): Error Amplifier Feedback Input. This pin receives the remotely-sensed feedback voltage from an external resistor divider across the output. ITH (Pin 2): Error Amplifier Output and Switching Regulator Compensation Point. The current comparator trip point increases with this control voltage. RUN/SS (Pin 3): Run Control, Soft-Start. If the voltage on this pin is held below 0.4V, the part is in shutdown. If the pin is released the capacitance to ground at this pin sets the soft-start ramp rate. An internal 1.25A soft-start current is always charging this pin. BOOST (Pin 4): Bootstrapped Supply to the Top Side Floating Driver. A low ESR capacitor is connected between the BOOST and SW pins and an external Schottky diode is tied between the BOOST and INTVCC pins. The voltage swing on the BOOST pin is INTVCC to (VIN + INTVCC). TG (Pin 5): High Current Gate Drive for Top N-channel MOSFET. This is the output of floating driver with a voltage swing equal to INTVCC superimposed on the switch node voltage. SW (Pin 6): Switch Node Connection to Inductor. The voltage swing on this pin is from a Schottky diode (external) forward voltage (when this diode is added across the Nchannel synchronous MOSFET) below ground to VIN. GND (Pin 7): Small Signal and Power Ground. This is the high current ground for the gate driver. The internal signal ground is Kelvin connected to this pin for noise suppression. BG (Pin 8): High Current Gate Drive for Bottom (Synchronous) N-channel MOSFET. The voltage swing at this pin is from ground to INTVCC. INTVCC (Pin 9): Output of the Internal 5V Low Dropout Regulator. The driver and control circuits are powered from this voltage. Must be decoupled to power ground with a minimum of 2.2F low ESR ceramic capacitor (X5R or better). VIN (Pin 10): Main Supply Pin. A bypass capacitor should be tied between this pin and the signal ground pin. SENSE- (Pin 11): The (-) Input to the Differential Current Comparator. SENSE+ (Pin 12): The (+) Input to the Differential Current Comparator. The ITH pin voltage and controlled offsets between the SENSE- and SENSE+ pins in conjunction with RSENSE (or RDCR) set the peak current trip threshold. SGND (Exposed Pad Pin 13): The exposed pad must be soldered to PCB ground for electrical contact and rated thermal performance.
3854fa
LTC3854 FuncTional DiagraM
VIN 1.2V 0.88V 0.80V BANDGAP/ LDO INTVCC BOOST OSCILLATOR INTVCC UVLO DRIVE CONTROL AND ANTI-SHOOT THROUGH ON CLK SQ R SLOPE COMP GENERATOR CURRENT SENSE COMPARATOR TG_OFF OV MAIN SWITCH DRIVER TG
SW SYNCHRONOUS SWITCH DRIVER BG GND
+ - +
RUN 0.88V VFB
SENSE- SENSE+
V TO I CONVERTER VSENSE ICS
+
ICMP
- +
SS
-
1.2V
-
SD
ITH
ERROR AMP VITH
- + + + -
0.4V
1.25A
LEVEL SHIFT 0.8V
RUN/SS
ITH
3854 FD
3854fa
LTC3854 operaTion
Main Control Loop The LTC3854 is a constant-frequency, peak current mode step-down controller. During normal operation, the top MOSFET is turned on when the clock sets the RS latch, and is turned off when the main current comparator, ICMP, resets the RS latch. The peak inductor current at which ICMP resets the RS latch is controlled by the voltage on the ITH pin, which is the output of the error amplifier EA. The VFB pin receives the voltage feedback signal, which is compared to the internal reference voltage by the EA. When the load current increases, it causes a slight decrease in VFB relative to the 0.8V reference, which in turn causes the ITH voltage to increase until the average inductor current matches the new load current. After the top MOSFET has turned off, the bottom MOSFET is turned on until the beginning of the next cycle. INTVCC Power Power for the top and bottom MOSFET drivers and most other internal circuitry is derived from the INTVCC pin. An internal 5V low dropout linear regulator supplies INTVCC power from VIN. The top MOSFET driver is biased from a floating bootstrap capacitor CB , which recharges during each off cycle through an external Schottky diode when the top MOSFET turns off. If the input voltage VIN decreases to a voltage close to VOUT, the loop may enter dropout and attempt to turn on the top MOSFET continuously. The dropout detector then forces the top MOSFET off for 1/10 of the clock period every fourth cycle to allow CB to recharge. Shutdown and Start-Up (RUN/SS) The LTC3854 is shut down using the RUN/SS pin. Pulling this pin below 1.2V disables the controller and most of the internal circuitry, including the INTVCC regulator. However, for RUN/SS>0.8V the internal bandgap is functional and the input current will be greater than the minimum shutdown current. To keep the part in a true shutdown mode the RUN/SS pin should be held below 0.4V. Releasing RUN/SS pin allows an internal 1.25A current to pull up the pin and enable the controller. Alternatively, the RUN/SS pin may be externally pulled up or driven directly by logic. Be careful not to exceed the Absolute Maximum Rating of 6V on this pin. The start-up of the controller's output voltage VOUT is governed by the voltage on the RUN/SS pin until RUN/SS > 2V. When the voltage on the RUN/SS pin is greater than 1.2V and less than 2V the LTC3854 regulates the VFB voltage to 1.2V below the RUN/SS pin voltage. The RUN/SS pin programs the soft-start period through an external capacitor from the RUN/SS pin to GND. An internal 1.25A pull-up current charges this capacitor creating a voltage ramp on the RUN/SS pin. As the RUN/SS voltage rises linearly from 1.2V to 2V, VOUT rises smoothly from zero to the target output voltage. When the LTC3854 is in undervoltage lockout the external MOSFETs are held off. Frequency of Operation The LTC3854 operates at a fixed frequency of 400kHz. Output Overvoltage Protection An overvoltage comparator, OV, guards against transient overshoots (>10%) as well as other more serious conditions that may overvoltage the output. In such cases, the top MOSFET is turned off and the bottom MOSFET is turned on until the overvoltage condition is cleared.
3854fa
LTC3854 applicaTions inForMaTion
The LTC3854 can be configured to use either DCR (inductor winding resistance) sensing or low value resistor sensing. The choice of the two current sensing schemes is largely a design tradeoff between cost, power consumption, and accuracy. DCR sensing is becoming popular because it eliminates expensive current sensing resistors and is more power efficient, especially in high current applications. However, current sensing resistors provide the most accurate current limits for the controller. Other external component selection is driven by the load requirement, and begins with the selection of RSENSE (if RSENSE is used) and inductor value. Next, the power MOSFETs and Schottky diodes are selected. Finally, input and output capacitors are selected. The Typical Application shown on the first page can be configured for operation up to 38V on VIN. SENSE+ and SENSE- Pins The SENSE+ and SENSE- pins are the inputs to the current comparator. The common mode input voltage range of the current comparator is 0V to 5.5V. Both SENSE pins are high impedance inputs with small input bias currents of less than 1A. When the SENSE pins ramp up from 0V to 1.4V, small bias currents flow out of the SENSE pins. When the SENSE pins ramp down from 5.5V to 1.1V, the small bias currents flow into the SENSE pins. The high impedance inputs to the current comparator allow accurate DCR sensing.
VIN INTVCC BOOST LTC3854 TG SW BG GND SENSE+ SENSE- RSENSE VOUT
Using a Sense Resistor for Current Sensing A typical sensing circuit using a discrete resistor is shown in Figure 1. RSENSE is chosen based on the required output current. The current comparator has a maximum threshold of 50mV. The input common mode range of the current comparator is 0V to 5.5V. The current comparator threshold sets the peak of the inductor current, yielding a maximum average output current IMAX equal to the peak value less half the peak-to-peak ripple current, IL. Allowing a margin of 20% for variations in the IC and external component values yields: VSENSE(MAX) I IMAX + L 2 Inductor DCR Sensing RSENSE = 0.8 * For applications requiring the highest possible efficiency, the LTC3854 is capable of sensing the voltage drop across the inductor DCR, as shown in Figure 2. The DCR of the inductor represents the small amount of DC copper winding resistance, which can be less than 1m for today's low value, high current inductors. When the external R1||R2*C1 time constant is chosen to be equal to the L/DCR time constant, the voltage drop across the external
FILTER COMPONENTS PLACED NEAR SENSE PINS
3854 F01
Figure 1. Using a Resistor to Sense Current with the LTC3854
3854fa
0
LTC3854 applicaTions inForMaTion
VIN VIN RUN/SS CSS CC CC2 RC RFB1 RFB2 TG CB ITH BOOST LTC3854 SW INTVCC CVINT BG GND M2 R1 C1 DBOOST INDUCTOR L DCR VOUT COUT M1 CIN
FB SENSE- SENSE+
R2
3854 F02
Figure 2. Buck Regulator Using DCR Current Sense
capacitor is equal to the voltage drop across the inductor DCR * R2/(R1+R2). R2 may be used to scale the voltage across the same terminals when the DCR is greater than the target sense resistance. Check the manufacturer's datasheet for specifications regarding the inductor DCR, in order to properly dimension the external filter components. The DCR of the inductor can also be measured using a precision RLC meter. Slope Compensation and Inductor Peak Current Slope compensation provides stability in constant-frequency architectures by preventing subharmonic oscillations at high duty cycles. It is accomplished internally by adding a compensating ramp to the inductor current signal. Normally, this results in a reduction of maximum inductor peak current for high duty cycles. However, the LTC3854 uses a novel scheme that allows the maximum inductor peak current to remain unaffected throughout all duty cycles.
Inductor Value Calculation The inductor value has a direct effect on ripple current. The inductor ripple current IL decreases with higher inductance or frequency and increases with higher VIN. LMIN = V 1 * VOUT 1- OUT IL * fSW VIN(MAX)
Accepting larger values of IL allows the use of low value inductors, but results in a higher output voltage ripple and greater core losses. A reasonable starting point for setting ripple current is IL = 0.4 * (IMAX). The maximum IL occurs at the maximum input voltage. Option 1: DCR within desired range R1* C1= L (R2 not used) DCR L (at 20C) DCR
Option 2: DCR > desired RSENSE R1||R2 * C1 =
RSENSE (EQ) = DCR(MAX) *
R2 R1+ R2
3854fa
LTC3854 applicaTions inForMaTion
Inductor Core Selection Once the value for L is determined, the type of inductor must be selected. High efficiency converters generally cannot afford the core loss found in low cost powdered iron cores, forcing the use of more expensive ferrite or molypermalloy cores. Actual core loss is independent of core size for a fixed inductor value, but it is very dependent on inductance selected. As inductance increases, core losses decrease. Unfortunately, increased inductance requires more turns of wire and therefore copper losses will increase. Ferrite designs have very low core loss and are preferred at high switching frequencies; allowing design goals to concentrate on copper loss and preventing saturation. Ferrite core material saturates "hard," which means that inductance collapses abruptly when the peak design current is exceeded. This results in an abrupt increase in inductor ripple current and consequent output voltage ripple. Do not allow the core to saturate! Power MOSFET and Schottky Diode (Optional) Selection Two external power MOSFETs must be selected for the LTC3854 controller: one N-channel MOSFET for the top (main) switch, and one N-channel MOSFET for the bottom (synchronous) switch. The peak-to-peak drive levels are set by the INTVCC voltage. This voltage is 5V during start-up. Consequently, logiclevel threshold MOSFETs can be used in most applications. The only exception is if low input voltage is expected (VIN < 5V); then, sub-logic level threshold MOSFETs (VGS(TH) < 3V) should be used. Pay close attention to the BVDSS specification for the MOSFETs as well; most of the logic level MOSFETs are limited to 30V or less. Selection criteria for the power MOSFETs include the on-resistance RDS(ON), Miller capacitance CMILLER, input voltage and maximum output current. Miller capacitance, CMILLER, can be approximated from the gate charge curve usually provided on the MOSFET manufacturers' data sheet. CMILLER is equal to the increase in gate charge along the horizontal axis while the curve is approximately flat divided by the specified change in VDS. This result is then multiplied by the ratio of the applied VDS to the gate charge curve specified VDS. When the IC is operating in continuous mode the duty cycles for the top and bottom MOSFETs are given by: Main Switch Duty Cycle = VOUT =D VIN VIN - VOUT = 1- D VIN
Synchronous Switch Duty Cycle =
The MOSFET power dissipations at maximum output current are given by: PMAIN = VOUT (IMAX )2 (1+ ) RDS(ON) + VIN
( VIN )2 IMAX (RDR )(CMILLER ) * 2
1 1 + (f) VINTVCC - VTH(MIN) VTH(MIN) V -V 2 PSYNC = IN OUT (IMAX ) (1+ ) RDS(ON) VIN where is the temperature dependency of RDS(ON) and RDR (approximately 2) is the effective driver resistance at the MOSFET's Miller threshold voltage. VTH(MIN) is the typical MOSFET minimum threshold voltage. Both MOSFETs have I2R losses while the topside N-channel equation includes an additional term for transition losses, which are highest at high input voltages. For VIN < 20V, the high current efficiency generally improves with larger MOSFETs, while for VIN > 20V the transition losses rapidly increase to the point that the use of a higher RDS(ON) device with lower CMILLER actually provides higher efficiency. The synchronous MOSFET losses are greatest at high input voltage when the top switch duty factor is low or during short-circuit when the synchronous switch is on close to 100% of the period. The term (1 + ) is generally given for a MOSFET in the form of a normalized RDS(ON) vs Temperature curve, but = 0.005/C can be used as an approximation for low voltage MOSFETs.
3854fa
LTC3854 applicaTions inForMaTion
An optional Schottky diode connected from GND (anode) to the SW node (cathode) conducts during the dead time between the conduction of the two power MOSFETs. This prevents the body diode of the bottom MOSFET from turning on, storing charge during the dead time and requiring a reverse recovery period that could cost as much as 3% in efficiency at high VIN. A 1A to 3A Schottky is generally a good size due to the relatively small average current. Larger diodes result in additional transition losses due to their larger junction capacitance. Soft-Start When the LTC3854 is configured to soft-start by itself, a capacitor must be connected to the RUN/SS pin. The LTC3854 is in the shutdown state if the RUN/SS pin voltage is below 1.2V. The RUN/SS pin has an internal 1.25A pull-up current and should be externally pulled low (<0.4V) to keep IC in shutdown mode. Once the RUN/SS pin voltage reaches 1.2V, the LTC3854 is enabled. As the RUN/SS pin moves from 1.2V to 2V the LTC3854 operates in a forced discontinuous mode with the bottom gate turning on only one time for every four clock cycles to allow the output to come up to its required value. During this time the error amp compares the FB pin to a level shifted version of the RUN/SS pin allowing the output to come up in a controlled fashion. Current foldback is disabled during this phase to ensure smooth soft-start or tracking. Once the RUN/SS pin is greater than 2V the LTC3854 operates in forced continuous mode. The LTC3854 output voltage is soft-start controlled when RUN/SS is between 1.2V and 2V. The total soft-start time can be calculated as: C t SOFT-START = 0.8 * SS 1.25A If the RUN/SS pin is externally driven beyond 2V (5V is recommended) the soft-start feature is disabled and the LTC3854 will immediately go into forced continuous mode. Care must be taken to insure the RUN/SS pin has either a capacitor tied to it or is driven externally. Do not let this pin float. INTVCC Regulator The LTC3854 features a PMOS low dropout linear regulator (LDO) that supplies power to INTVCC from the VIN supply. INTVCC powers the gate drivers and much of the LTC3854's internal circuitry. The LDO regulates the voltage at the INTVCC pin to 5V when VIN is greater than 6V. The LDO supplies a peak current of 40mA and must be bypassed to ground with a minimum of 2.2F low ESR ceramic capacitor. Good bypassing is needed to supply the high transient currents required by the MOSFET gatedrivers. High input voltage applications in which large MOSFETs are being driven at high frequencies may cause the maximum junction temperature rating for the LTC3854 to be exceeded. The INTVCC current, which is dominated by the gate-charge current, is supplied by the 5V LDO. Power dissipation for the IC in this case is highest and is equal to VIN *IINTVCC. The gate-charge current is dependent on operating frequency (400kHz), and the QG of the power MOSFETs, as discussed in the Efficiency Considerations section. The junction temperature can be estimated by using the equations given in Note 3 of the Electrical Characteristics section. For example, if the LTC3854 INTVCC current is limited to less than 17mA from a 36V supply in the DFN package; then the junction temperature is: TJ = 70C + [(17mA*36V)*(76C/W)] = 116.5C To prevent the maximum junction temperature from being exceeded, the input supply current must be checked during operation at maximum VIN. Topside MOSFET Driver Supply (CB, DB) An external bootstrap capacitor CB connected from the BOOST pin to the SW pin and supplies the gate drive voltage for the topside MOSFET. Capacitor CB in the Functional Diagram is charged though external diode DB from INTVCC when the SW pin is low. When the topside MOSFET is to be turned on, the driver places the CB voltage across the gate source of the MOSFET. This enhances the MOSFET and turns on the topside switch. The switch node voltage, SW, rises to VIN and the BOOST pin follows. With the topside MOSFET on, the boost voltage is above the input supply: VBOOST = VIN + VINTVCC. The value of the boost
3854fa
LTC3854 applicaTions inForMaTion
capacitor CB needs to be at least 100 times that of the total input capacitance of the topside MOSFET. The reverse breakdown of the external Schottky diode must be greater than VIN(MAX). When adjusting the gate-drive level, the final arbiter is the total input current for the regulator. If a change is made and the input current decreases, then the efficiency has improved. If there is no change in input current, then there is no change in efficiency. Undervoltage Lockout The LTC3854 has two functions that help protect the controller in case of undervoltage conditions. A precision UVLO comparator constantly monitors the INTVCC voltage to ensure that an adequate gate-drive voltage is present. Switching action is disabled when INTVCC is below 3.5V. To prevent oscillation caused by a disturbance on INTVCC, the UVLO comparator has 350mV of hysteresis. Another way to detect an undervoltage condition is to monitor the VIN supply. The RUN/SS pin has a precision turn-on reference of 1.2V, enabling a resistor divider to VIN to turn on the IC when VIN is above the desired value. It is recommended that the resistor divider be used if the input voltage will be quickly cycled on and off. CIN Selection In forced continuous mode, the source current of the top N-channel MOSFET is a square wave of duty cycle VOUT/VIN. To prevent large voltage transients, a low ESR input capacitor sized for the maximum RMS current must be used. IRMS = IOUT 2
1/ 2 IMAX ( VOUT ) * ( VIN - VOUT )) VIN
current ratings are often based on only 2000 hours of life. This makes it advisable to further derate the capacitor or to choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet size or height requirements in the design. Always consult the manufacturer if there is any question. COUT Selection The selection of COUT is primarily determined by the effective series resistance (ESR) to minimize voltage ripple. The output ripple (VOUT) in continuous mode is: 1 VOUT = IL ESR + 8 * fSW * COUT Where fSW = 400kHz, COUT = output capacitance and IL = ripple current in the inductor. The output ripple is highest at maximum input voltage since IL increases with input voltage. Typically, once the ESR requirement for COUT has been met, the RMS current rating generally far exceeds the IRIPPLE(P-P) requirement. With IL= 0.3IOUT(MAX) and allowing 2/3 of the ripple due to ESR, the output ripple will be less than 50mV at max VIN assuming: COUT Required ESR < 2.2 RSENSE COUT > 1 8fSW RSENSE
The maximum RMS capacitor current is: IRMS =
This formula has a maximum at VIN = 2*VOUT, where IRMS = IOUT/2. This simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. Note that capacitor manufacturers' ripple
The first condition relates to the ripple current into the ESR of the output capacitance while the second term guarantees that the output capacitance does not significantly discharge during the operating frequency period due to ripple current. The choice of smaller output capacitance increases the ripple voltage due to the discharging term but can be compensated with capacitors of very low ESR to maintain the ripple voltage at or below 50mV. The ITH pin OPTI-LOOP compensation components can be optimized to provide stable, high performance transient response regardless of the output capacitors selected. The selection of output capacitors for applications with large load current transients is primarily determined by the voltage tolerance specifications of the load. The resistive component of the capacitor, ESR, multiplied by the load current change plus any output voltage ripple must be within the voltage tolerance of the load.
3854fa
LTC3854 applicaTions inForMaTion
The required ESR due to a load current step is: ESR V I in cost-driven applications, provided that consideration is given to ripple current ratings, temperature and long-term reliability. A typical application will require several aluminum electrolytic capacitors in parallel. A combination of the above mentioned capacitors will often result in maximizing performance and minimizing overall cost. Other capacitor types include Nichicon PL series, NEC Neocap, Panasonic SP and Sprague 595D series. Consult manufacturers for other specific recommendations. Like all components, capacitors are not ideal. Each capacitor has its own benefits and limitations. Combinations of different capacitor types have proven to be a very cost effective solution. Remember also to include high frequency decoupling capacitors. They should be placed as close as possible to the power pins of the load. Any inductance present in the circuit board traces negates their usefulness. Setting Output Voltage The LTC3854 output voltage is set by an external feedback resistive divider carefully placed across the output, as shown in Figure 3. The regulated output voltage is determined by: R VOUT = 0.8 1+ B RA
VOUT LTC3854 FB RA
3854 F03
where I is the change in current from full load to zero load (or minimum load) and V is the allowed voltage deviation (not including any droop due to finite capacitance). The amount of capacitance needed is determined by the maximum energy stored in the inductor. The capacitance must be sufficient to absorb the change in inductor current when a high current to low current transition occurs. The opposite load current transition is generally determined by the control loop OPTI-LOOP components, so make sure not to over compensate and slow down the response. The minimum capacitance to assure the inductors' energy is adequately absorbed is: L ( I) COUT > 2 ( V ) VOUT
2
Manufacturers such as Nichicon, United Chemi-Con and Sanyo should be considered for high performance through-hole capacitors. The OS-CON semiconductor electrolyte capacitor available from Sanyo has the lowest (ESR)(size) product of any aluminum electrolytic at a somewhat higher price. An additional ceramic capacitor in parallel with OS-CON capacitors is recommended to reduce the inductive effects. In surface mount applications, ESR, RMS current handling and load step specifications may require multiple capacitors in parallel. Aluminum electrolytic, dry tantalum and special polymer capacitors are available in surface mount packages. Special polymer surface mount capacitors offer very low ESR but have much lower capacitive density per unit volume than other capacitor types. These capacitors offer a very cost-effective output capacitor solution and are an ideal choice when combined with a controller having high loop bandwidth. Tantalum capacitors offer the highest capacitance density and are often used as output capacitors for switching regulators having controlled soft-start. Several excellent surge-tested choices are the AVX TPS, AVX TPSV or the KEMET T51 0 series of surface mount tantalums, available in case heights ranging from 1.5mm to 4.1mm. Aluminum electrolytic capacitors can be used
RB
CFF
Figure 3. Feed-Forward Capacitor on FB Pin
To improve the frequency response, a feed-forward capacitor, CFF, may be used. Great care should be taken to route the VFB line away from noise sources, such as the inductor or the SW line. Fault Conditions: Current Foldback The LTC3854 includes current foldback to help limit load current when the output is shorted to ground. If the output falls below 40% of its nominal output level, the maximum
3854fa
LTC3854 applicaTions inForMaTion
sense voltage is progressively lowered from its maximum programmed value to 25% of the maximum value. Foldback current limiting is disabled during soft-start. Minimum and Maximum On-Time Considerations Minimum on-time tON(MIN) is the smallest time duration that the LTC3854 is capable of turning on the top MOSFET. It is determined by internal timing delays and the gate charge required to turn on the top MOSFET. Low duty cycle applications may approach this minimum on-time limit and care should be taken to ensure that VOUT >t VIN * fSW ON(MIN) If the duty cycle falls below what can be accommodated by the minimum on-time, the controller will begin to skip cycles. The output voltage will continue to be regulated, but the ripple voltage and current will increase. The minimum on-time for the LTC3854 is approximately 75ns. However, as the peak sense voltage decreases the minimum on-time gradually increases. This is of particular concern in forced continuous applications with low ripple current at light loads. If the duty cycle drops below the minimum on-time limit in this situation, a significant amount of cycle skipping can occur with correspondingly larger current and voltage ripple. Care should also be taken for applications where the duty cycle can approach the maximum given in the data sheet (98%). In all low dropout applications, such as VOUT = 5V and VIN(MIN) = 4.5V, careful selection of the bottom synchronous MOSFET is required. For applications where the input voltage can drop below the targeted output voltage, and subsequently ramp up, a low threshold synchronous MOSFET with a small total gate charge should be chosen. This selection for the bottom synchronous MOSFET will insure that the bottom gate minimum on-time is sufficient in dropout to allow for the initial boost capacitor refresh that is needed to adequately turn on the top side driver and begin the switching cycle. Another method to guarantee performance in this type of application is to increase the minimum output load to 50mA. This minimum load will allow the user to choose larger MOSFETs for delivery of large currents when VIN is in the normal operating range yet still provide an adequate safety margin and good overall performance in dropout with a slow ramping VIN. Efficiency Considerations The efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Percent efficiency can be expressed as: %Efficiency = 100% - (L1 + L2 + L3 + ...) where L1, L2, etc. are the individual losses as a percentage of input power. Although all dissipative elements in the circuit produce losses, four main sources usually account for most of the losses in LTC3854 circuits: 1) IC VIN current, 2) INTVCC regulator current, 3) I2R losses, 4) Topside MOSFET transition losses. 1. The VIN current is the DC supply current given in the Electrical Characteristics table, which excludes MOSFET driver and control currents. VIN current typically results in a small (<0.1%) loss. 2. INTVCC current is the sum of the MOSFET driver and control currents. The MOSFET driver current results from switching the gate capacitance of the power MOSFETs. Each time a MOSFET gate is switched from low to high to low again, a packet of charge dQ moves from INTVCC to ground. The resulting dQ/dt is a current out of INTVCC that is typically much larger than the control circuit current. In continuous mode, IGATECHG = f(QT + QB), where QT and QB are the gate charges of the topside and bottom side MOSFETs. 3. I2R losses are predicted from the DC resistances of the fuse (if used), MOSFET, inductor, current sense resistor. In continuous mode, the average output current flows through L and RSENSE, but is "chopped" between the topside MOSFET and the synchronous MOSFET. If the two MOSFETs have approximately the same RDS(ON), then the resistance of one MOSFET can simply be summed with the resistances of L and RSENSE to obtain
3854fa
LTC3854 applicaTions inForMaTion
I2R losses. For example, if each RDS(ON) = 10m, DCR = 10m, RSENSE = 5m then the total resistance is 25m. This results in losses ranging from 2% to 8% as the output current increases from 3A to 15A for a 5V output, or a 3% to 12% loss for a 3.3V output. Efficiency varies as the inverse square of VOUT for the same external components and output power level. The combined effects of increasingly lower output voltages and higher currents required by high performance digital systems is not doubling but quadrupling the importance of loss terms in the switching regulator system! 4. Transition losses apply only to the topside MOSFET(s), and become significant only when operating at high input voltages (typically 15V or greater). Transition losses can be estimated from: Transition Loss = 1.7VIN2 * IO(MAX) * CRSS * fS Other "hidden" losses such as copper trace and the battery internal resistance can account for an additional 5% to 10% efficiency degradation in portable systems. It is very important to include these "system" level losses during the design phase. The internal battery and fuse resistance losses can be minimized by making sure that CIN has adequate charge storage and very low ESR at the switching frequency. A 25W supply will typically require a minimum of 20F to 40F of capacitance having a maximum of 20m to 50m of ESR. Other losses including Schottky conduction losses during dead time and inductor core losses generally account for less than 2% total additional loss. Checking Transient Response The regulator loop response can be checked by looking at the load current transient response. Switching regulators take several cycles to respond to a step in DC (resistive) load current. When a load step occurs, VOUT shifts by an amount equal to ILOAD * ESR, where ESR is the effective series resistance of COUT. ILOAD also begins to charge or discharge COUT generating the feedback error signal that forces the regulator to adapt to the current change and return VOUT to its steady-state value. During this recovery time VOUT can be monitored for excessive overshoot or ringing, which would indicate a stability problem. The availability of the ITH pin not only allows optimization of control loop behavior but also provides a DC coupled and AC filtered closed loop response test point. The DC step, rise time and settling at this test point truly reflects the closed loop response. Assuming a predominantly second order system, phase margin and/or damping factor can be estimated using the percentage of overshoot seen at this pin. The bandwidth can also be estimated by examining the rise time at the pin. The ITH external components shown in the Typical Application circuit will provide an adequate starting point for most applications. The ITH series RC-CC filter sets the dominant pole-zero loop compensation. The values can be modified slightly (from 0.5 to 2 times their suggested values) to optimize transient response once the final PC layout is done and the particular output capacitor type and value have been determined. The output capacitors need to be selected because the various types and values determine the loop gain and phase. An output current pulse of 20% to 80% of full-load current having a rise time of 1s to 10s will produce output voltage and ITH pin waveforms that will give a sense of the overall loop stability without breaking the feedback loop. Placing a power MOSFET directly across the output capacitor and driving the gate with an appropriate signal generator is a practical way to produce a realistic load step condition. The initial output voltage step resulting from the step change in output current may not be within the bandwidth of the feedback loop, so this signal cannot be used to determine phase margin. This is why it is better to look at the ITH pin signal which is in the feedback loop and is the filtered and compensated control loop response. The gain of the loop will be increased by increasing RC and the bandwidth of the loop will be increased by decreasing CC. If RC is increased by the same factor that CC is decreased, the zero frequency will be kept the same, thereby keeping the phase shift the same in the most critical frequency range of the feedback loop. The output voltage settling behavior is related to the stability of the closed-loop system and will demonstrate the actual overall supply performance. A second, more severe transient is caused by switching in loads with large (>1F) supply bypass capacitors. The discharged bypass capacitors are effectively put in parallel with COUT, causing a rapid drop in VOUT. No regulator can alter its delivery of current quickly enough to prevent this
3854fa
LTC3854 applicaTions inForMaTion
sudden step change in output voltage if the load switch resistance is low and it is driven quickly. If the ratio of CLOAD to COUT is greater than 1:50, the switch rise time should be controlled so that the load rise time is limited to approximately 25 * CLOAD. Thus a 10F capacitor would require a 250s rise time, limiting the charging current to about 200mA. PC Board Layout Checklist When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3854. These items are also illustrated graphically in the layout diagram of Figure 4. Check the following in your layout: 1) Are the signal and power grounds segregated? The LTC3854 GND pin should tie to the ground plane close to the output capacitor(s). The low current or signal ground trace should make a single point connection directly to the GND pin. The synchronous MOSFET source pins should connect to the input capacitor(s) ground. 2) Does the VFB pin connect directly to the feedback resistors? The resistive divider R1, R2 must be connected between the (+) plate of COUT and signal ground. The 47pF to 100pF capacitor should be as close as possible to the LTC3854. Be careful locating the feedback resistors too far away from the LTC3854. The VFB line should not be routed close to any other nodes with high slew rates.
+
SW LTC3854 TG CSS CC CC2 3 2 1 11 1000pF 12 RUN/SS ITH VFB SENSE- SENSE+ BOOST VIN INTVCC BG GND 6 5 4 VIN 10 9 8 7 DB CB D1 M2 CIN
RC 47pF
+
4.7F
+
M1
-
L1
-
R1 COUT RSENSE VOUT
R2
Figure 4. LTC3854 Layout Diagram
+
3854 F04
+
3854fa
LTC3854 applicaTions inForMaTion
3) Are the SENSE- and SENSE+ leads routed together with minimum PC trace spacing? The filter capacitor between SENSE+ and SENSE- should be as close as possible to the LTC3854. Ensure accurate current sensing with Kelvin connections as shown in Figure 5. Series resistance can be added to the SENSE lines to increase noise rejection. 4) Does the (+) terminal of CIN connect to the drain of the topside MOSFET(s) as closely as possible? This capacitor provides the AC current to the MOSFET(s). 5) Is the INTVCC decoupling capacitor connected closely between INTVCC and GND? This capacitor carries the MOSFET driver peak currents. 6) Keep the switching node (SW), top gate node (TG), bottom gate node (BG) and boost node (BOOST) away from sensitive small-signal nodes, especially from the voltage and current sensing feedback pins. All of these nodes have very large and fast moving signals and therefore should be kept on the "output side" (Pins 4,5,6 and 8) of the LTC3854 GND and occupy minimum PC trace area. PC Board Layout Debugging It is helpful to use a DC-50MHz current probe to monitor the current in the inductor while testing the circuit. Monitor the output switching node (SW pin) to synchronize the oscilloscope to the internal oscillator and probe the actual output voltage as well. Check for proper performance over the operating voltage and current range expected in the application. The frequency of operation should be maintained over the input voltage range down to dropout. The duty cycle percentage should be maintained from cycle to cycle in a well-designed, low noise PCB implementation. Variation in the duty cycle at a subharmonic rate can suggest noise pickup at the current or voltage sensing inputs or inadequate loop compensation. Overcompensation of the loop can be used to tame a poor PC layout if regulator bandwidth optimization is not required. A 1 to 10 boost resistor may help to improve noise immunity. This resistor is placed between the BOOST pin and the node formed by the cathode of the boost Schottky and the positive terminal of the boost capacitor. Investigate whether any problems exist only at higher output currents or only at higher input voltages. If problems coincide with high input voltages and low output currents, look for capacitive coupling between the BOOST, SW, TG, and possibly BG connections and the sensitive voltage and current pins. The capacitor placed across the current sensing pins needs to be placed immediately adjacent to the pins of the IC. This capacitor helps to minimize the effects of differential noise injection due to high frequency capacitive coupling. If problems are encountered with high current output loading at lower input voltages, look for inductive coupling between CIN, Schottky and the top MOSFET components to the sensitive current and voltage sensing traces. In addition, investigate common ground path voltage pickup between these components and the GND pin of the IC.
CURRENT SENSE RESISTOR (RSENSE) SENSE+ SENSE-
3854 F04
Figure 5. Kelvin Sensing RSENSE
3854fa
LTC3854 applicaTions inForMaTion
Design Example Consider the design of a 1.2V, 15A buck regulator with a VIN range of 4.5V to 28V using a DCR sensing scheme. Inductor Selection Assuming an inductor ripple of 40% of IOUT, L can be calculated for the worst case of VIN = VIN(MAX). LMIN = LMIN = V 1 * VOUT 1- OUT IL * fSW VIN(MAX) also help insure the minimum on-time requirement of 75ns is not violated). tON(MIN) = tON(MIN) = VOUT VIN(MAX) * fSW
1.2V 20V * 400kHz tON(MIN) = 150ns To choose R1 for DCR sensing we use: R1* C1= L at 25C DCR
1 1.2V * 1.2V * 1- 0.40 * 15A * 400kHz 20V LMIN = 0.47H
Next, determine the DCR of the inductor. When provided, use the manufacturer's maximum value, usually given at 25C. Increase this value to account for the temperature coefficient of resistance, which is approximately 0.4%/C. A conservative value for TLMAX is 100C which corresponds to a delta of 0.3. To allow the converter to source 15A with an inductor temperature of 100C without hitting maximum current limit we need a DCR at 25C of: DCR(25C) = 0.8 * VSENSE(MAX) IL IMAX + 2 * (1+ ) 0.8 * 50mV DCR(25C) = 15A * 0.4 15A + * (1+ 0.3) 2 DCR(25C) = 1.7m The 0.56H inductor from the IHLP4040DZ-01 series has a typical DCR of 1.7m and a maximum of 1.8m and as ISAT of 49A. The saturation current is well above our operating current maximum. The maximum inductor will be the DC value plus one half the ripple current. Using this inductor gives an inductor ripple current of 6A (keeping the ripple current high will
Choosing C1 = 100nF and using the maximum DCR value at 25C, we get: 0.56H 1.8m * 100nF R1= 3.11k R1= Choose 3.09k. Output Capacitor Selection The output voltage AC ripple due to capacitive impedance and ESR in normal continuous mode operation can be calculated from: 1 VOUT = IL ESR + 8 * fSW * COUT The second term is the AC capacitive impedance part of the above equation and used alone will yield a minimum COUT of: COUT > COUT > IL 8 * fSW * VOUT
0.4 * 15A 8 * 400kHz * 0.01* 1.2V COUT > 156F
3854fa
0
LTC3854 applicaTions inForMaTion
However, the amount of capacitance needed is determined not only by the allowed ripple in steady state but by the maximum energy stored in the inductor. The capacitance must be sufficient in value to absorb the change in inductor current when a high current to low current transient occurs. The minimum capacitance to assure the inductor's energy is adequately absorbed during a 5A load step for a maximum overshoot of 2% is: L * IL 2 COUT 2 * VOUT * VOUT 0.56H * (5A)2 0.02 * 1.2V COUT 583F COUT A maximum overshoot or undershoot of 2% for a 5A load step will require an ESR of: ESR < 0.02 * VOUT 1.2V = 0.02 * 5m ILOAD 5A Choosing CIN Capacitors CIN is chosen for a RMS current rating of at least IOUT(MAX)/2 = 6A. Again, keeping ESR low will improve performance and reduce power loss (several capacitors in parallel is once again a good choice). We will use an 180F 25V electrolytic with 2x 10F 25V low ESR ceramic capacitors connected in parallel. Choosing MOSFETs The power dissipation in the main and synchronous FETs can be easily estimated. Choosing a Renesas RJK0305DPB for the main FET results in the following parameters: BVDSS = 30V RDS(ON) = 13m maximum at 25C, VGS = 4.5V QGD = 1.5nC at VDS, test 10V results in CMILLER = 1.5nC/10V = 150pF QG = 8nC, typical, at VGS = 4.5V VMILLER = 2.8V At VIN = 20V, IOUT = 15A, estimated TJ = 100C for the top FET and given VINTVCC = 5.0V RDR,PULLUP = 2.6 RDR,PULLDOWN = 1.5 the total losses in the main FET will be: PMAIN = 1.2V * (15A)2 * 1+ 0.005 * (100C - 25C) 20V 2 15A * 13m + ( 20V ) * * 150pF 2 1.2 2.5 * + *f 5V - 2.8V 2.8V SW
Several quality capacitors are available with low enough ESR. Multilayer ceramic capacitors tend to have very low ESR values. It is also a good practice to reduce the ESL by putting several capacitors in parallel on the output (a parallel bank of larger and smaller capacitors will improve performance in both a DC and a transient condition). To keep ripple very low and design for any possible large excursions in current 2x 330F (tantalum or polymer surface) and 1x 47F polymer low ESR type were connected in parallel. Choosing FB Resistors (See Figure 3) R VOUT = 0.8 1+ B RA RB = 0.5R A Using 1% 10.0k for RA gives 1% 4.99k for RB.
(
)
PMAIN = 0.55W
3854fa
LTC3854 applicaTions inForMaTion
Choosing an RJK0330DPB for the bottom FET will provide: BVDSS = 30V RDS(ON) = 3.9m maximum at 25C, VGS = 4.5V QG = 27nC, typical, at VGS = 4.5V PSYNC = 20V - 1.2V 2 * (15A ) 20V * (1+ 0.005 * (100C - 25C)) * 3.9m Some airflow may be required for higher ambient temperatures. A maximum MOSFET junction temperature of 110C at worst case ambient generally provides adequate margin. Given a typical QG of 8nC for the RJK0305DPB and 27nC for the RJK0330DPB and the 400kHz switching frequency, the current supplied by INTVCC will be: IGATECHG = (8nC + 27nC) * 400kHz = 14mA The resulting controller temperature at 60C and a 20V input will be: TJ = 60C + 20V * 14mA * 76C/W = 81C which is well under the maximum junction temperature of 125C.
VIN 4.5V TO 28V 10F 25V 2 VOUT 1.2V 15A COUT1 330F 2
PSYNC = 1.1W Assuming a thermal resistance of 40C/W for the main and synchronous FETs, the resulting junction temperatures at an ambient of 60C will be 82C and 104C, respectively.
VIN 0.1F LTC3854 TG RUN/SS 2200pF 3.9k 10k FB 4.99k SENSE- BG 100pF ITH BOOST SW
M1 0.1F L 0.56H 1.8m DCR 3.09k
180F 25V
0.1F
D1 INTVCC 4.7F
+
M2
COUT2 47F
SENSE+
GND
D1 = CMDSH-3 M1 = RENESAS RJK0305DPB M2 = RENESAS RJK0330DPB L = VISHAY IHLP4040DZ-01 0.56H COUT1 = SANYO 2R5TPE330M9 COUT2 = MURATA GRM31CR60J476K
3854 F06
Figure 6. 1.2V/15A Converter from Design Example
3854fa
LTC3854 Typical applicaTions
VIN 0.1F LTC3854 TG RUN/SS 2200pF 3.9k 20k FB 17.4k 1nF SENSE+ 47 47
3854 TA02
M1 0.1F
180F 25V
VIN 4.5V TO 14V 47F 25V 2
ITH 100pF
BOOST SW D1 INTVCC 4.7F BG M2 COUT2 47F 2 L 0.56H RSENSE 2m VOUT 1.5V 15A COUT1 330F 2
+
SENSE-
GND
D1 = CMDSH-3 M1 = RENESAS RJK0305DPB M2 = RENESAS RJK0330DPB L = TOKO FDA1055-R56M COUT1 = SANYO 2R5TPE330M9 COUT2 = MURATA GRM31CR60J476K
Figure 7. 1.5V/15A RSENSE Application
3854fa
LTC3854 Typical applicaTions
VIN TG 0.1F LTC3854 RUN/SS 2200pF 15k 32.4k FB 8.06k SENSE- SENSE+ GND BG 100pF INTVCC 4.7F M2 ITH BOOST SW D1 0.1F M1 180F 25V L 0.22H, 1.8m DCR 0.1F VIN 4.5V TO 14V 47F 25V 2 VOUT 1V 20A COUT1 330F 2
1.21k
+
COUT2 47F 2
D1 = CMDSH-3 M1, M2 = VISHAY Si7866ADP L = SUMIDA CDEP104NP-0R2NC COUT1 = SANYO 2RSTPE330M9 COUT2 = MURATA GRM31CR60J476K
3854 TA03
Figure 8. 1.0V/20A DCR Sense Application
VIN 0.1F LTC3854 TG RUN/SS 2200pF 7.5k 8.06k FB 42.2k 4.7nF SENSE+ 16 16 GND SENSE- BG 100pF ITH BOOST SW D1 INTVCC 4.7F M2 L 3.6H 0.1F M1
150F 50V
VIN 6V TO 38V 47F 50V 2
RSENSE 3m
+
VOUT 5V 10A COUT1 220F
D1 = ZETEX ZLLS1000 M1, M2 = INFINEON BSC093N04LS L = COILTRONICS HC1-3R6-R COUT1 = SANYO 6TPE220MI
3854 TA04
Figure 9. 5.0V/10A RSENSE Application
3854fa
LTC3854 package DescripTion
(Reference LTC DWG # 05-08-1723 Rev O)
0.64 0.05 (2 SIDES) 0.70 0.05 2.55 0.05 1.15 0.05 PACKAGE OUTLINE 0.25 0.05 2.39 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 3.00 0.10 (2 SIDES) R = 0.05 TYP 2.00 0.10 (2 SIDES) 0.64 0.10 (2 SIDES) 6 0.23 0.05 2.39 0.10 (2 SIDES) BOTTOM VIEW--EXPOSED PAD R = 0.115 TYP 7 0.40 0.10 12 0.45 BSC
DDB Package 12-Lead Plastic DFN
PIN 1 BAR TOP MARK (SEE NOTE 6) 0.200 REF
1
PIN 1 R = 0.20 OR 0.25 x 45 CHAMFER
(DDB12) DFN 0106 REV O
0.75 0.05
0.45 BSC
0 - 0.05
NOTE: 1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
3854fa
LTC3854 package DescripTion
MSE MSE Package Package 12-Lead Plastic MSOP Exposed Pad , 12-Lead Plastic MSOP, Exposed Die Die Pad
(Reference LTC # 05-08-1666 Rev B) (Reference LTC DWG DWG # 05-08-1666 Rev B)
BOTTOM VIEW OF EXPOSED PAD OPTION 2.845 (.112 0.102 .004)
0.889 (.035
0.127 .005)
2.845 (.112 1
0.102 .004) 6 0.35 REF
5.23 (.206) MIN
1.651 (.065
0.102 3.20 - 3.45 .004) (.126 - .136)
0.12 REF DETAIL "B" CORNER TAIL IS PART OF DETAIL "B" THE LEADFRAME FEATURE. FOR REFERENCE ONLY 7 NO MEASUREMENT PURPOSE 0.406 0.076 (.016 .003) REF
12
0.65 0.42 0.038 (.0256) (.0165 .0015) BSC TYP RECOMMENDED SOLDER PAD LAYOUT
DETAIL "A" 0 - 6 TYP
4.039 0.102 (.159 .004) (NOTE 3)
12 11 10 9 8 7
0.254 (.010)
GAUGE PLANE
4.90 0.152 (.193 .006)
3.00 0.102 (.118 .004) (NOTE 4)
0.53 0.152 (.021 .006)
DETAIL "A"
0.18 (.007)
1.10 (.043) MAX
123456
0.86 (.034) REF
SEATING PLANE
NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.22 - 0.38 (.009 - .015) TYP
0.650 (.0256) BSC
0.1016 (.004
0.0508 .002)
MSOP (MSE12) 0608 REV B
3854fa
LTC3854 revision hisTory
REV A DATE 10/09 DESCRIPTION Edits to Typical Application Updated Efficiency Graph Edit to Electrical Characteristics and Notes Text Changes to Pin Functions Change to Functional Diagram Updated Related Parts Table PAGE NUMBER 1 1 3, 4 7 8 28
3854fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LTC3854 relaTeD parTs
PART NUMBER DESCRIPTION LTC3851A/ LTC3851A-1 LTC3878 LTC3879 LTC3850/ LTC3850-1/ LTC3850-2 LTC3853 LTM(R)4600HV LTM4601AHV LTC3601 LTC3603 LTC3605 LTC3608 LTC3609 LTC3610 LTC3611 LTC3824 LTC3834/ LTC3834-1 LT(R)3845 No RSENSETM Wide VIN Range Synchronous Step-Down DC/DC Controller No RSENSE Constant On-Time Synchronous Step-Down DC/DC Controller No RSENSE Constant On-Time Synchronous Step-Down DC/DC Controller Dual 2-Phase, High Efficiency Synchronous Step-Down DC/DC Controllers, RSENSE or DCR Current Sensing and Tracking COMMENTS Phase-Lockable Fixed Operating Frequency, 250kHz to 750kHz, 4V VIN 38V, 0.8V VOUT 5.25V, MSOP-16E, 3mm x 3mm QFN-16, SSOP-16 Very Fast Transient Response, tON(MIN) = 43ns, 4V VIN 38V, 0.8V VOUT 0.9VIN, SSOP-16 Very Fast Transient Response, tON(MIN) = 43ns, 4V VIN 38V, 0.6V VOUT 0.9VIN, MSOP-16E, 3mm x 3mm QFN-16 Phase-Lockable Fixed Operating Frequency, 250kHz to 780kHz, 4V VIN 30V, 0.8V VOUT 5.25V
Triple Output, Multiphase Synchronous Step-Down DC/DC Phase-Lockable Fixed Operating Frequency, 250kHz to 750kHz, 4V VIN Controller, RSENSE or DCR Current Sensing and Tracking 24V, VOUT Up to 13.5V 10A DC/DC Module(R) Complete Power Supply 12A DC/DC Module Complete Power Supply 1.5A, 4MHz, Monolithic Synchronous Step-Down DC/DC Converter 2.5A, 3MHz, Monolithic Synchronous Step-Down DC/DC Converter 5A, 4MHz, Monolithic Synchronous Step-Down DC/DC Converter 8A, 1MHz, Monolithic Synchronous Step-Down DC/DC Converter 6A, 1MHz, Monolithic Synchronous Step-Down DC/DC Converter 12A, 1MHz, Monolithic Synchronous Step-Down DC/DC Converter 10A, 1MHz, Monolithic Synchronous Step-Down DC/DC Converter Low IQ, High Voltage DC/DC Controller, 100% Duty Cycle Low IQ, Synchronous Step-Down DC/DC Controller Low IQ, High Voltage Synchronous Step-Down DC/DC Controller High Efficiency, Compact Size, Ultrafast Transient Response, 4.5V VIN 28V, 0.8V VOUT 5V, 15mm x 15mm x 2.8mm High Efficiency, Compact Size, Ultrafast Transient Response, 4.5V VIN 28V, 0.8V VOUT 5V, 15mm x 15mm x 2.8mm High Efficiency, Phase Lockable, IQ = 300A, 4V VIN 15V, VOUT(MIN) 0.6V, 3mm x 3mm QFN-16, MSOP-16E High Efficiency, Phase Lockable, IQ = 75A, 4.5V VIN 15V, VOUT(MIN) 0.6V, 4mm x 4mm QFN-20 High Efficiency, Adjustable Frequency, 800kHz to 4MHz, 4V VIN 15V, VOUT(MIN) 0.6V, 4mm x 4mm QFN-24 High Efficiency, Adjustable Constant On-Time, 4V VIN 18V, VOUT(MIN) 0.6V, 7mm x 8mm QFN-52 High Efficiency, Adjustable Constant On-Time, 4V VIN 32V, VOUT(MIN) 0.6V, 7mm x 8mm QFN-52 High Efficiency, Adjustable Constant On-Time, 4V VIN 24V, VOUT(MIN) 0.6V, 9mm x 9mm QFN-64 High Efficiency, Adjustable Constant On-Time, 4V VIN 32V, VOUT(MIN) 0.6V, 9mm x 9mm QFN-64 Selectable Fixed Operating Frequency, 4V VIN 60V, 0.8V VOUT VIN, IQ = 40A, MSOP-10E Phase-Lockable Fixed Operating Frequency, 140kHz to 650kHz, 4V VIN 36V, 0.8V VOUT 10V, IQ = 30A, Adjustable Fixed Operating Frequency, 100kHz to 500kHz, 4V VIN 60V, 1.23V VOUT 36V, IQ = 30A, TSSOP-16
Module is a registered trademark of Linear Technology Corporation. No RSENSE is a trademark of Linear Technology Corporation.
3854fa
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507
LT 1209 REV A * PRINTED IN USA
www.linear.com
LINEAR TECHNOLOGY CORPORATION 2009

▲Up To Search▲

Price & Availability of LTC3854IDDB

	To Download LTC3854IDDB Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .